FPGA Architecture

Market Segment

    • Build Automation
    • Factory Automation
    • Marine
    • Automotive
    • ....
    • ....



Embedded Graphic System



Fpga SoC Architecture Video Example

  • Advanced Micro-controller Bus Architecture (AMBA) on-chip bus
  • Advanced high-performance bus (AHB)
  • Advanced peripheral bus (APB)
  • Integrated Multi-Layer AHB/APBarchitecture
  • (Bandwidth 384 MByte x Sec. x Layer)



IP - Functional Block

  • Exor International IP are designed for fpga architecture, produce “Functional blocks” (IP + sw Driver), more than IPs, optimized for performance, flexibilityand scalabilityto be used standard Exor products and OEM products.

  • Exor has improved designers’ effectiveness and lower overall production costs, ready for mass production.

  • Exor International FPGA solution are Field proven +500.000 electronic devices used in professional application, and beside the usual verification methods, any solution have gone through rigorous test in the most severe environmental.
 
 
 
 


IP - Functional Block Library





Standard Enhanced
Integration

 UltiEBB Enhanced Bit Block, Graphic accelerator
UltiEVC Enhanced Video Controller
UltiEMEM Versatile Memory Controller
UltiFlash Flash - Static bus controller
UltiVidin Fully programmable Video Input module
UltiADDA Analog to Digital - Digital to Analog Converter
  (Touch screen controller)
UltiKBD Matrix Keyboard controller
UltiECAN Enhanced Can 2.0B Controller
UltiUart High performance UART
UltiEMAC MAC Ethernet 10-100
UltiI2CM I2C Master
UltiI2CS I2C Slave
UltiSPI SPI Master controller
UltiAC97 AC97 Audio Controller


Several other IP logic cores inlcuding:
  • PWM
  • Stepper motor
  • Encoder
  • Analog and Digital I/O cores
  • ...


Performance*

  • DDR Memory Bus clock bandwith 133 MHz
  • 512 MByte/s - 16 Bit organization
  • AMBA bus 384 MByte/s x Layer
  • Up 80MHz video clock

(* based Lattice ECP2-5 reference design)


Easly integration existing platform

  • UltiLogic is designed to be adapted todifferent Buses system and platformintegrating in fpga dedicated Wrapper IP to interface.
  • AMBA bus architecture.



Portability







  • UltiLogic modular architecture enhances portability
  • Modules can be implemented using various target primitive libraries, enabling synthesis for various target platforms


Scalability

Features = Scalability and same software
Chip consumption = Lower Cost

  • IP cores are organize and develop a modular architecture
  • Enables replacement of the individual modules for different and specific features
  • Enables removing and reordering of pipeline stages to enable solution scale-down or retargeting

Application Logic IP



Example: UltiEVC Video Controller IP

State of art TFT Video Controller Architecture in term of modularity, performance and fpga resources optimization
 
 
  • Fully programmable Modular and scalable design
  • Video Pixel clock (up to 80Mhz)
  • Eabling higher refresh rate
  • Enabling High resolutions up to 1920x1200
  • Multilayer Video and Blending support
  • 8/16/24 bit RGB color
  • Independent sync generation and frame buffer control
  • Field-proven tested +50 TFT models 320x240 up to 1366x768


Example: UltiECAN - Enhanced Control Area Network IP

Compliance with CAN 2.0A and CAN 2.0B protocol specifications

Bit timing requirements, hard synchronization and resynchronization supported

Supports CAN bus arbitration, automatic retransmission in error case and arbitration lost, transmission abort automatic Bus Off recovery.

Error handling and fault confinement supported

Automatic CRC code generation and check up
Supported baud rates up to 1 Mbit per second
Separated global masking feature and frame type recording for Standard and Extended CAN frames

Support for auto baud detection (bus listening)
Up to 15TX and Up to 31 RX buffers consuming only one dual-port Block RAM (32 buffers total)

Mixed type frame block transmissions in configuration featuring more than 1 TX buffer
Interrupt processing for all errors and message exchange